{"id":16187,"date":"2025-07-08T06:10:05","date_gmt":"2025-07-08T06:10:05","guid":{"rendered":"https:\/\/www.itaca.upv.es\/stf\/the-fault-tolerant-systems-group-presents-its-advances-at-the-sarteco-conference\/"},"modified":"2025-07-08T06:10:05","modified_gmt":"2025-07-08T06:10:05","slug":"the-fault-tolerant-systems-group-presents-its-advances-at-the-sarteco-conference","status":"publish","type":"post","link":"https:\/\/www.itaca.upv.es\/stf\/the-fault-tolerant-systems-group-presents-its-advances-at-the-sarteco-conference\/","title":{"rendered":"The \u201cFault Tolerant Systems\u201d Group presents its advances at the SARTECO Conference"},"content":{"rendered":"\n

The Fault Tolerant Systems research<\/a> group from the ITACA Institute at the Universitat Polit\u00e8cnica de Val\u00e8ncia<\/a> actively participated in the SARTECO 2025 Conference,<\/a> held in Seville from 25 to 27 June.<\/p>\n\n\n\n

This event, organised by the Spanish Society of Computer Architecture and Technology (SARTECO)<\/a>, brought together academic and scientific experts to discuss the latest advances in high-performance computing.<\/p>\n\n\n\n

\u201cThese conferences foster collaboration and synergies between research groups, <\/strong>while also increasing our community\u2019s visibility and enhancing our chances of transferring technological developments to industry\u201d, said ITACA researchers.<\/p>\n\n\n\n

Three oral presentations<\/strong><\/p>\n\n\n\n

During the conference, Joaqu\u00edn Gracia Mor\u00e1n, Luis-J. Saiz Adalid and Juan Carlos Ruiz<\/strong> delivered several oral presentations focusing on the development of more reliable, robust, and adaptable neural networks for critical environments<\/strong>.<\/p>\n\n\n\n

\"\"
Joaqu\u00edn Grac\u00eda Mor\u00e1n, ITACA researcher<\/figcaption><\/figure>\n\n\n\n

\u201cWe presented our advances aimed at improving the dependability of neural networks. <\/strong>We also shared some intelligent fault-tolerance strategies that allow these systems to continue operating correctly in critical contexts such as the automotive or industrial sectors\u201d, noted the Fault Tolerant Systems research group.<\/p>\n\n\n\n

\"\"
Luis Jos\u00e9 Saiz Adalid, ITACA researcher<\/figcaption><\/figure>\n\n\n\n

This work is part of the DEFADAS project, which focuses on developing FPGA-accelerated neural networks with sufficient reliability for critical applications such as automotive systems<\/strong>. It is also linked to the UPV educational innovation project (PIME\/24-25\/435), which aims to enhance engineering education through practical experiences with fault-tolerant systems.<\/p>\n\n\n\n

\"\"
Juan Carlos Ruiz, ITACA researcher<\/figcaption><\/figure>\n\n\n\n

Through its involvement, the ITACA Institute’s group reaffirms its commitment to cutting-edge research and to developing secure, robust solutions for integration into real-world, high-impact systems.<\/strong><\/p>\n\n\n\n

<\/p>\n\n\n\n \n

\n

\n\n\n\n

Noticia elaborada por ITACA FORWARD, financiada por Ivace+i Innovaci\u00f3n y la Uni\u00f3n Europea a trav\u00e9s del Programa Fondo Europeo de Desarrollo Regional (FEDER) Comunitat Valenciana 2021-2027 (Referencia del proyecto: INNVA2\/2025\/17)<\/code><\/sub><\/em><\/p>\n\n\n\n

\n

<\/p>\n<\/blockquote>\n\n\n\n

\"\"<\/figure>\n","protected":false},"excerpt":{"rendered":"

Researchers Joaqu\u00edn Gracia Mor\u00e1n, Luis-J. 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