{"id":13330,"date":"2024-01-22T17:42:41","date_gmt":"2024-01-22T17:42:41","guid":{"rendered":"https:\/\/www.itaca.upv.es\/?page_id=13330"},"modified":"2026-04-10T10:48:22","modified_gmt":"2026-04-10T10:48:22","slug":"publications","status":"publish","type":"page","link":"https:\/\/www.itaca.upv.es\/stf\/publications\/","title":{"rendered":"Publications"},"content":{"rendered":"

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Publications<\/h1>\n

[\/et_pb_text][\/et_pb_column][\/et_pb_row][\/et_pb_section][et_pb_section fb_built=\u00bb1″ fullwidth=\u00bbon\u00bb disabled_on=\u00bbon|off|off\u00bb module_class=\u00bbtitulo-grande \u00bb _builder_version=\u00bb4.23.1″ _module_preset=\u00bbdefault\u00bb custom_margin=\u00bb||65px||false|false\u00bb global_colors_info=\u00bb{}\u00bb][et_pb_fullwidth_header title=\u00bbPublications\u00bb _builder_version=\u00bb4.24.0″ _module_preset=\u00bbdefault\u00bb title_font=\u00bb|700|||||||\u00bb title_text_align=\u00bbright\u00bb title_text_color=\u00bb#f1f1f1″ title_font_size=\u00bb200px\u00bb background_color=\u00bbRGBA(255,255,255,0)\u00bb width=\u00bb100%\u00bb module_alignment=\u00bbright\u00bb custom_margin=\u00bb|0px||0px|false|false\u00bb custom_padding=\u00bb0px|0px|10px|0px|false|false\u00bb global_colors_info=\u00bb{}\u00bb][\/et_pb_fullwidth_header][\/et_pb_section][et_pb_section fb_built=\u00bb1″ _builder_version=\u00bb4.22.1″ _module_preset=\u00bbdefault\u00bb custom_padding=\u00bb3px|||||\u00bb global_colors_info=\u00bb{}\u00bb][et_pb_row _builder_version=\u00bb4.23″ _module_preset=\u00bbdefault\u00bb width=\u00bb100%\u00bb width_tablet=\u00bb96%\u00bb width_phone=\u00bb96%\u00bb width_last_edited=\u00bbon|phone\u00bb max_width=\u00bb1200px\u00bb global_colors_info=\u00bb{}\u00bb][et_pb_column type=\u00bb4_4″ _builder_version=\u00bb4.23″ _module_preset=\u00bbdefault\u00bb global_colors_info=\u00bb{}\u00bb][et_pb_text _builder_version=\u00bb4.27.6″ _module_preset=\u00bbdefault\u00bb text_line_height=\u00bb1.3em\u00bb custom_margin=\u00bb||||false|false\u00bb custom_padding=\u00bb||||false|false\u00bb hover_enabled=\u00bb0″ custom_css_free_form=\u00bbli {|| margin-bottom: 15px;||}\u00bb global_colors_info=\u00bb{}\u00bb sticky_enabled=\u00bb0″]<\/p>\n

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  1. Tuzov, Ilya; de Andr\u00e9s, David; Ruiz, Juan Carlos; Hern\u00e1ndez, Carles, An open-source methodology to emulate transient faults in ASIC storage cells using AMD Ultrascale+ FPGAs<\/strong>, ACM Transactions on Reconfigurable Technology and Systems, 2006, DOI: https:\/\/doi.org\/10.1145\/3797884<\/a>.<\/li>\n
  2. Gracia-Mor\u00e1n, Joaqu\u00edn; Saiz-Adalid, Luis-J.; Baraza-Calvo, Juan-Carlos; Gil Tom\u00e1s, Daniel Antonio; Gil, Pedro, A Proposal of an ECC-based Adaptive Fault-Tolerant Mechanism for 16-bit data words<\/strong>, IEEE Latin America Transactions, 2024, DOI: https:\/\/doi.org\/10.1109\/TLA.2024.10500715<\/a>.<\/li>\n
  3. Gil Tom\u00e1s, Daniel Antonio; Saiz-Adalid, Luis-J.; Gracia-Mor\u00e1n, Joaqu\u00edn; Baraza-Calvo, Juan-Carlos; Gil, Pedro, A Hybrid Technique Based on ECC and Hardened Cells for Tolerating Random Multiple-Bit Upsets in SRAM Arrays<\/strong>, IEEE Access, 2024, DOI: https:\/\/doi.org\/10.1109\/ACCESS.2024.3402532<\/a>.<\/li>\n
  4. Mart\u00ednez, Miquel; Ruiz, Juan Carlos; Antunes, Nuno; de Andr\u00e9s, David; Vieira, Marco, A Multi-Criteria Analysis of Benchmark Results With Expert Support for Security Tools<\/strong>, IEEE Transactions on Dependable and Secure Computing, 2022, DOI: https:\/\/doi.org\/10.1109\/TDSC.2020.3048202<\/a>.<\/li>\n
  5. Gracia-Mor\u00e1n, Joaqu\u00edn; Saiz-Adalid, Luis-J.; Baraza-Calvo, Juan-Carlos; Gil Tom\u00e1s, Daniel Antonio; Gil, Pedro, Design, Implementation and Evaluation of a Low Redundant Error Correction Code<\/strong>, IEEE Latin America Transactions, 2021, DOI: https:\/\/doi.org\/10.1109\/TLA.2021.9475624<\/a>.<\/li>\n
  6. Baraza Calvo, Juan Carlos; Gracia-Mor\u00e1n, Joaqu\u00edn; Saiz-Adalid, Luis-J.; Gil Tom\u00e1s, Daniel Antonio; Gil, Pedro, Proposal of an Adaptive Fault Tolerance Mechanism to Tolerate Intermittent Faults in RAM<\/strong>, Electronics, 2020, DOI: https:\/\/doi.org\/10.3390\/electronics9122074<\/a>.<\/li>\n
  7. Saiz-Adalid, Luis-J.; Gracia-Mor\u00e1n, Joaqu\u00edn; Gil Tom\u00e1s, Daniel Antonio; Baraza Calvo, Juan Carlos; Gil, Pedro, Reducing the Overhead of BCH Codes: New Double Error Correction Codes<\/strong>, Electronics, 2020, DOI: https:\/\/doi.org\/10.3390\/electronics9111897<\/a>.<\/li>\n
  8. Tuzov, Ilya; de Andr\u00e9s, David; Ruiz, Juan Carlos, Simulating the effects of logic faults in implementation-level VITAL-compliant models<\/strong>, Computing, 2019, DOI: https:\/\/doi.org\/10.1007\/s00607-018-0651-4<\/a>.<\/li>\n
  9. Gil Tom\u00e1s, Daniel Antonio; Gracia-Mor\u00e1n, Joaqu\u00edn; Saiz-Adalid, Luis-J.; Gil, Pedro, Fault Modeling of Graphene Nanoribbon FET Logic Circuits<\/strong>, Electronics, 2019, DOI: https:\/\/doi.org\/10.3390\/electronics8080851<\/a>.<\/li>\n
  10. Saiz-Adalid, Luis-J.; Gracia-Mor\u00e1n, Joaqu\u00edn; Gil Tom\u00e1s, Daniel Antonio; Baraza Calvo, Juan Carlos; Gil, Pedro, Ultrafast Codes for Multiple Adjacent Error Correction and Double Error Detection<\/strong>, IEEE Access, 2019, DOI: https:\/\/doi.org\/10.1109\/ACCESS.2019.2947315<\/a>.<\/li>\n
  11. Tuzov, Ilya; de Andr\u00e9s, David; Ruiz, Juan Carlos, Tuning synthesis flags to optimize implementation goals: Performance and robustness of the LEON3 processor as a case study<\/strong>, Journal of Parallel and Distributed Computing, 2018, DOI: https:\/\/doi.org\/10.1016\/j.jpdc.2017.10.002<\/a>.<\/li>\n
  12. Gracia-Mor\u00e1n, Joaqu\u00edn; Saiz-Adalid, Luis-J.; Gil Tom\u00e1s, Daniel Antonio; Gil, Pedro, Improving Error Correction Codes for Multiple-Cell Upsets in Space Applications<\/strong>, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2018, DOI: https:\/\/doi.org\/10.1109\/TVLSI.2018.2837220<\/a>.<\/li>\n
  13. Friginal L\u00f3pez, Jes\u00fas; Miquel Mart\u00ednez; David de Andr\u00e9s; Ruiz Garc\u00eda, Juan Carlos, Multi-criteria analysis of measures in benchmarking: Dependability benchmarking as a case study<\/strong>. Journal of Systems and Software, 2016, DOI: https:\/\/doi.org\/10.1016\/j.jss.2015.08.052<\/a>.<\/li>\n
  14. Gil Tom\u00e1s, Daniel Antonio; Gracia-Mor\u00e1n, Joaqu\u00edn; Baraza Calvo, Juan Carlos; Saiz-Adalid, Luis-J.; Gil, Pedro, Injecting Intermittent Faults for the Dependability Assessment of a Fault-Tolerant Microcomputer System<\/strong>, IEEE Transactions on Reliability, 2016, DOI: https:\/doi.org\/10.1109\/TR.2015.2484058<\/a>.<\/li>\n
  15. Friginal L\u00f3pez, Jes\u00fas; David de Andr\u00e9s; Ruiz Garc\u00eda, Juan Carlos; Miquel Mart\u00ednez, REFRAHN: A Resilience Evaluation Framework for Ad Hoc Routing Protocols<\/strong>, Computer Networks, 2015, DOI: https:\/\/doi.org\/10.1016\/j.comnet.2015.02.032<\/a>.<\/li>\n
  16. Friginal L\u00f3pez, Jes\u00fas; Ruiz Garc\u00eda, Juan Carlos; David de Andr\u00e9s; Antonio, Ambient noise in wireless mesh networks: Evaluation and proposal of an adaptive algorithm to mitigate link removal<\/strong>, Journal of Network and Computer Applications, 2014, DOI: https:\/\/doi.org\/10.1016\/j.jnca.2014.02.004<\/a>.<\/li>\n
  17. Friginal L\u00f3pez, Jes\u00fas; David de Andr\u00e9s; Ruiz Garc\u00eda, Juan Carlos; Miquel Mart\u00ednez, A Survey of Evaluation Platforms for Ad Hoc Routing Protocols: a Resilience Perspective<\/strong>, Computer Networks, 2014, DOI: https:\/\/doi.org\/10.1016\/j.comnet.2014.09.010<\/a>.<\/li>\n
  18. Miquel Mart\u00ednez; David de Andr\u00e9s; Ruiz Garc\u00eda, Juan Carlos; Friginal L\u00f3pez, Jes\u00fas, From Measures to Conclusions using Analytic Hierarchy Process in Dependability Benchmarking<\/strong>, IEEE Transactions on Instrumentation and Measurement, 2014, DOI: https:\/\/doi.org\/ 10.1109\/TIM.2014.2348632<\/a>.<\/li>\n
  19. Friginal L\u00f3pez, Jes\u00fas; Andr\u00e9s Mart\u00ednez, David De; Ruiz Garc\u00eda, Juan Carlos; Gil Vicente, Pedro Joaqu\u00edn, Towards benchmarking routing protocols in wireless mesh networks<\/strong>, Ad Hoc Networks, 2014, DOI: https:\/\/doi.org\/10.1016\/j.adhoc.2011.03.010<\/a>.<\/li>\n
  20. Gracia-Mor\u00e1n, Joaqu\u00edn; Baraza Calvo, Juan Carlos; Gil Tom\u00e1s, Daniel Antonio; Saiz-Adalid, Luis-J.; Gil, Pedro, Effects of Intermittent Faults on the Reliability of a Reduced Instruction Set Computing (RISC) Microprocessor<\/strong>, IEEE Transactions on Reliability, 2014, https:\/\/doi.org\/10.1109\/TR.2014.2299711<\/a>.<\/li>\n
  21. Gil Tom\u00e1s, Daniel Antonio; Gracia-Mor\u00e1n, Joaqu\u00edn; Baraza Calvo, Juan Carlos; Saiz-Adalid, Luis-J.; Gil Vicente, Pedro Joaqu\u00edn, Studying the effects of intermittent faults on a microcontroller<\/strong>, Microelectronics Reliability, 2012, DOI: https:\/doi.org\/10.1016\/j.microrel.2012.06.004<\/a>.<\/li>\n
  22. Gil Tom\u00e1s, Daniel Antonio; Gracia-Mor\u00e1n, Joaqu\u00edn; Baraza Calvo, Juan Carlos; Saiz-Adalid, Luis-J.; Gil Vicente, Pedro Joaqu\u00edn, Analyzing the impact of Intermittent Faults on Microprocessors applying Fault Injection<\/strong>, IEEE Design & Test of Computers, 2012, DOI: https:\/\/doi.org\/10.1109\/MDT.2011.2179514<\/a>.<\/li>\n
  23. S. Blanc; A. Bonastre; P.J. Gil,\u00a0<\/span>Dependability assessment of by-wire control systems using fault injection<\/strong>, Journal of Systems Architecture, 55 2009, DOI: <\/span>https:\/\/doi.org\/10.1016\/j.sysarc.2008.09.003<\/a>.<\/li>\n
  24. David de Andr\u00e9s; Juan Carlos Ruiz; Daniel Gil; Pedro Gil, Fault Emulation for Dependability Evaluation of VLSI Systems<\/strong>, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2008, DOI: https:\/\/doi.org\/10.1109\/TVLSI.2008.920988<\/a>.<\/li>\n
  25. Juan-Carlos Baraza; Joaqu\u00edn Gracia; Sara Blanc; Daniel Gil; Pedro-J. Gil, Enhancement of fault injection techniques based on the modification of VHDL code<\/strong>. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2008, https:\/\/doi.org\/10.1109\/TVLSI.2008.2000254<\/a>.<\/li>\n
  26. D. Gil; J. Gracia; J.C. Baraza; P.J. Gil, Impact of faults in combinational logic of commercial microcontrollers<\/strong>, Lecture Notes in Computer Science, 2005, DOI:\u00a0 https:\/\/doi.org\/10.1007\/11408901_28<\/a>.<\/li>\n
  27. David de Andr\u00e9s; Jos\u00e9 Albaladejo; Lenin Lemus; Pedro Gil, Fast Run-Time Reconfiguration for SEU Injection<\/strong>, Lecture Notes in Computer Science, 2005, DOI: https:\/\/doi.org\/10.1007\/11408901_18<\/a>.<\/li>\n
  28. Albaladejo; D. de Andr\u00e9s; L. Lemus, Codesign methodology for computer vision applications<\/strong>, Microprocessors and Microsystems, 2004, DOI: https:\/\/doi.org\/10.1016\/j.micpro.2004.03.010<\/a>.<\/li>\n
  29. P. Yuste; J.C. Ruiz; L. Lemus; P. Gil, Non-Intrusive Software-Implemented Fault Injection in Embedded Systems<\/strong>, Lecture Notes in Computer Science, 2003, DOI: https:\/\/doi.org\/10.1007\/978-3-540-45214-0_5<\/a>.<\/li>\n
  30. Joaquin Gracia; Juan C. Baraza; Daniel Gil; Pedro J. Gil, Using VHDL-Based Fault Injection for the Early Diagnosis of a TTP\/C Controller<\/strong>. IEICE Transactions on Information and Systems, 2003.<\/li>\n
  31. D.Gil; J. Gracia; J.C. Baraza; P.J. Gil, Study, comparison and application of different VHDL-based fault injection techniques for the experimental validation of a fault-tolerant system<\/strong>. Microelectronics Journal, 2003, DOI: https:\/\/doi.org\/10.1016\/S0026-2692(02)00128-3<\/a>.<\/li>\n
  32. J.C. Baraza; J. Gracia; D. Gil; P.J. Gil, A Prototype of a VHDL-Based Fault Injection Tool: Description and Application<\/strong>, Journal of Systems Architecture, 2002, DOI: https:\/\/doi.org\/10.1016\/S1383-7621(01)00036-4<\/a>.<\/li>\n
  33. J.C. Campelo; P. Yuste; P.J. Gil; J.J. Serrano, <\/span>DICOS: a real-time distributed industrial control system for embedded applications<\/strong>, Control Engineering Practice, 2001: DOI: https:\/\/doi.org\/10.1016\/S0967-0661(00)00120-9<\/a>.<\/span><\/li>\n
  34. Jos\u00e9 V. Busquets-Mataix; Daniel Gil; Pedro Gil,\u00a0<\/span>Techniques to increase the schedulable utilization of cache-based preemptive real-time systems<\/strong>. Journal of Systems Architecture, 2000, DOI: https:\/\/doi.org\/10.1016\/S1383-7621(99)00011-9<\/a>.<\/span><\/li>\n
  35. J.C. Campelo; P. Yuste; F. Rodr\u00edguez; P. Gil; J.J. Serrano, Dependability Evaluation of Fault Tolerant Distributed Industrial Control Systems<\/strong>, Lecture Notes in Computer Science, 1999, DOI: https:\/\/doi.org\/10.1007\/BFb0097920<\/a>.<\/li>\n
  36. Campelo Rivadulla, Jos\u00e9 Carlos; Rodr\u00edguez-Ballester, Francisco; Rubio Moreno, Alicia; Ors Carot, Rafael; Gil, Pedro; Lemus Z\u00fa\u00f1iga, Lenin Guillermo; Busquets Mataix, Jos\u00e9 Vicente; Albaladejo Mero\u00f1o, Jos\u00e9; Serrano Mart\u00edn, Juan Jos\u00e9, Distributed industrial control systems: a fault tolerant architecture<\/strong>, Microprocessors and Microsystems, 1999, DOI: https:\/\/doi.org\/10.1016\/S0141-9331(99)00019-8<\/a>.<\/li>\n
  37. J.C. Campelo; P. Yuste; F. Rodr\u00edguez; P. J. Gil; J.J. Serrano, Hierarchical Reliability and Safety Models of Fault Tolerant Distributed Industrial Control Systems<\/strong>, Lecture Notes in Computer Science, 1999, DOI: https:\/\/doi.org\/10.1007\/3-540-48249-0_18<\/a>.<\/li>\n
  38. D. Gil; J.C. Baraza; J.V. Busquets; P. Gil, Inyecci\u00f3n de fallos mediante simulaci\u00f3n de modelos en VHDL. Un sistema computador sencillo<\/strong>, Informaci\u00f3n Tecnol\u00f3gica, 1998.<\/li>\n
  39. Peris, M; Ors, R.; Bonastre, A.; Gil, P., Application of rule nets to temporal reasoning in the monitoring of a chemical analysis process<\/strong>, Laboratory Automation And Information Management, 1997, DOI: https:\/\/doi.org\/10.1016\/S1381-141X(97)00008-7<\/a>.<\/li>\n
  40. M. Peris; R. Ors; A. Bonastre; P.J. Gil; J.J. Serrano, Advanced application of rule nets to the automation of chemical analysis systems<\/strong>, Analytica Chimica Acta, 1997, DOI: https:\/\/doi.org\/10.1016\/S0003-2670(97)00429-7<\/a>.<\/li>\n<\/ol>\n
      <\/ol>\n

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      Publications Tuzov, Ilya; de Andr\u00e9s, David; Ruiz, Juan Carlos; Hern\u00e1ndez, Carles, An open-source methodology to emulate transient faults in ASIC storage cells using AMD Ultrascale+ FPGAs, ACM Transactions on Reconfigurable Technology and Systems, 2006, DOI: https:\/\/doi.org\/10.1145\/3797884. Gracia-Mor\u00e1n, Joaqu\u00edn; Saiz-Adalid, Luis-J.; Baraza-Calvo, Juan-Carlos; Gil Tom\u00e1s, Daniel Antonio; Gil, Pedro, A Proposal of an ECC-based Adaptive Fault-Tolerant […]<\/p>\n","protected":false},"author":1,"featured_media":0,"parent":0,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"","meta":{"_acf_changed":false,"_et_pb_use_builder":"on","_et_pb_old_content":"","_et_gb_content_width":"","footnotes":""},"difl_page_category":[],"class_list":["post-13330","page","type-page","status-publish","hentry"],"acf":[],"yoast_head":"\nPublications | ITACA STF<\/title>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/www.itaca.upv.es\/stf\/publications\/\" \/>\n<meta property=\"og:locale\" content=\"es_ES\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"Publications | ITACA STF\" \/>\n<meta property=\"og:description\" content=\"Publications Tuzov, Ilya; de Andr\u00e9s, David; Ruiz, Juan Carlos; Hern\u00e1ndez, Carles, An open-source methodology to emulate transient faults in ASIC storage cells using AMD Ultrascale+ FPGAs, ACM Transactions on Reconfigurable Technology and Systems, 2006, DOI: https:\/\/doi.org\/10.1145\/3797884. Gracia-Mor\u00e1n, Joaqu\u00edn; Saiz-Adalid, Luis-J.; Baraza-Calvo, Juan-Carlos; Gil Tom\u00e1s, Daniel Antonio; Gil, Pedro, A Proposal of an ECC-based Adaptive Fault-Tolerant […]\" \/>\n<meta property=\"og:url\" content=\"https:\/\/www.itaca.upv.es\/stf\/publications\/\" \/>\n<meta property=\"og:site_name\" content=\"ITACA STF\" \/>\n<meta property=\"article:modified_time\" content=\"2026-04-10T10:48:22+00:00\" \/>\n<meta name=\"twitter:card\" content=\"summary_large_image\" \/>\n<meta name=\"twitter:label1\" content=\"Tiempo de lectura\" \/>\n\t<meta name=\"twitter:data1\" content=\"11 minutos\" \/>\n<script type=\"application\/ld+json\" class=\"yoast-schema-graph\">{\"@context\":\"https:\\\/\\\/schema.org\",\"@graph\":[{\"@type\":\"WebPage\",\"@id\":\"https:\\\/\\\/www.itaca.upv.es\\\/stf\\\/publications\\\/\",\"url\":\"https:\\\/\\\/www.itaca.upv.es\\\/stf\\\/publications\\\/\",\"name\":\"Publications | ITACA STF\",\"isPartOf\":{\"@id\":\"https:\\\/\\\/www.itaca.upv.es\\\/stf\\\/#website\"},\"datePublished\":\"2024-01-22T17:42:41+00:00\",\"dateModified\":\"2026-04-10T10:48:22+00:00\",\"breadcrumb\":{\"@id\":\"https:\\\/\\\/www.itaca.upv.es\\\/stf\\\/publications\\\/#breadcrumb\"},\"inLanguage\":\"es\",\"potentialAction\":[{\"@type\":\"ReadAction\",\"target\":[\"https:\\\/\\\/www.itaca.upv.es\\\/stf\\\/publications\\\/\"]}]},{\"@type\":\"BreadcrumbList\",\"@id\":\"https:\\\/\\\/www.itaca.upv.es\\\/stf\\\/publications\\\/#breadcrumb\",\"itemListElement\":[{\"@type\":\"ListItem\",\"position\":1,\"name\":\"Portada\",\"item\":\"https:\\\/\\\/www.itaca.upv.es\\\/stf\\\/\"},{\"@type\":\"ListItem\",\"position\":2,\"name\":\"Publications\"}]},{\"@type\":\"WebSite\",\"@id\":\"https:\\\/\\\/www.itaca.upv.es\\\/stf\\\/#website\",\"url\":\"https:\\\/\\\/www.itaca.upv.es\\\/stf\\\/\",\"name\":\"ITACA STF\",\"description\":\"\",\"potentialAction\":[{\"@type\":\"SearchAction\",\"target\":{\"@type\":\"EntryPoint\",\"urlTemplate\":\"https:\\\/\\\/www.itaca.upv.es\\\/stf\\\/?s={search_term_string}\"},\"query-input\":{\"@type\":\"PropertyValueSpecification\",\"valueRequired\":true,\"valueName\":\"search_term_string\"}}],\"inLanguage\":\"es\"}]}<\/script>\n<!-- \/ Yoast SEO plugin. -->","yoast_head_json":{"title":"Publications | ITACA STF","robots":{"index":"index","follow":"follow","max-snippet":"max-snippet:-1","max-image-preview":"max-image-preview:large","max-video-preview":"max-video-preview:-1"},"canonical":"https:\/\/www.itaca.upv.es\/stf\/publications\/","og_locale":"es_ES","og_type":"article","og_title":"Publications | ITACA STF","og_description":"Publications Tuzov, Ilya; de Andr\u00e9s, David; Ruiz, Juan Carlos; Hern\u00e1ndez, Carles, An open-source methodology to emulate transient faults in ASIC storage cells using AMD Ultrascale+ FPGAs, ACM Transactions on Reconfigurable Technology and Systems, 2006, DOI: https:\/\/doi.org\/10.1145\/3797884. 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